Mechanical Strain for 0 . 16 m nMOSFET on 30 m Si - Substrate

This paper reports the successful substrate transfer based on standard IC processing to an alternative substrate e.g. plastic. The device on ultra-thin Si substrate using grinding backside Si and thermo-compression bonding process is proposed. Acceptable electrical performances are achieved means that the substrate transfer process is controlled well. The DC characteristics of nMOSFETs as a function of orientations and device sizes under mechanical strain are also reported. Good performance and reliability of nMOSFETs under mechanical strain is obtained. The results suggest the feasibility of substrate transfer in achieving well-performance nMOSFETs for 3D integration or SiP technologies. Introduction Over the last ten years, integrated IC has moved to an emerging technology enabling electronic functionalities integrated on flexible substrates. System-in-Package (SiP) and three-dimensional (3D) integration technologies [1]-[2] are the solutions for miniaturization of systemized semiconductor devices. The substrate transfer to develop the ultra-thin chip technology for semiconductor chip on flexible substrate is the key topics. The advantages of substrate transfer are lightness, thinness, shortness, and minimization properties for portable electronics product. Recently, DBG (Dicing Before Grinding) process has been proposed to ultra-thin Si substrate less than 30 μm by mechanical grinding and plasma treatment process [3]. Ultra-thin Si substrate has the inherit merit of high flexibility. The package can be applied to a flat, curve surface, and even a dynamic surface. In this work, we report the device characteristics on high flexibility of ultra-thin Si substrate on plastic under mechanical strain. Good performance and reliability of nMOSFETs under mechanical strain is obtained. Experimental Procedure The n-type MOSFETs were used by a 0.16 m technology and then fabricated on 8-in wafer at an IC foundry. In order to achieve integration onto plastic, we used DBG process to achieve 30 m Si substrate. DBG process provides a review of chip thickness, die strength and functional test yield related to thinning procedure and indicates wafer strength enhancement after DBG process [4]-[6]. Fig. 1(a) shows the process flow of DBG. The first step is die saws and sticks by tape for wafer grinding. Then, backside mechanical coarse grinding and fine grinding is used for large depth remove. After that, the plasma etching is performed to remove about 3 m Si-substrate. The 30 m wafer is split as chips. And then, we bonded the chips on 140 μm polyethylene terephthalate (PET) plastic to achieve UTCOF. Fig. 1(b) shows the wafer with 30 m thickness Si-substrate is flexible and under a large mechanical strain does not crack due to DBG procedure enhances wafer strength. Two bending vehicles with radius of 15 mm and 25 mm are used for bending test. Results and Discussion The comparison of ID,sat, ID,lin, gm,lin and Vth for 0.16 m n-MOSFET before and after substrate transfer is shown in Fig. 2. The cumulative probability curve indicates the wafer-in-wafer before and after DBG process is uniformity. Acceptable electrical characteristics are achieved indicates that the DBG process can be controlled well. To further utilize the inherit merit of high flexibility for ultra-thin Si substrate, we have applied a mechanical tensile strain on ultra-thin die using bending vehicles. Fig. 3(a) shows the variation of saturation drain current with different radius of bending vehicles and orientations. It can be seen hat the saturation drain current under the longitudinal tensile strain is significant increase but only slightly increase under the transverse tensile strain. A 2.97% and 1.31% of Id,sat improvement is obtained under longitudinal strain on radius of 15 mm and 25 mm bending vehicles. The strain effect of VT (extracted the normalization Id equal to 1 A at Vd=0.1V) is only ~0.003V slightly lower with longitudinal and transverse tensile strain for nMOSFETs. The slight VT shift indicates that the oxide charge and inversion layer are only a little bit change. For further analysis the strain effect, the 30 m Si substrate on 140 m plastic under 15 mm radius of curvature tensile strain can be calculated using ANSYS simulation software as shown in Fig. 3(b). The 15 mm radius of curvature gives a tensile strain of 0.038%, respectively, assuming that the Young’s Modulus of Si is 115GPa [7]. The variation of Id,sat and VT as a function of device length and width under are longitudinal strain on bending vehicle of 15 mm radius shown in Fig. 4. The Id,sat increment rate is larger than 2.2% while the channel length is larger than 0.6 m. In short channel (channel length lower than 0.24 m), the Id,sat increment rate is about 1.45%. The Id,sat increment rate of strain-induced drain current is larger in the long-channel devices than in short-channel devices on 30 m thick Si-substrate. This is due to the shorter devices exhibited a lower channel surface stress compared with longer ones [7]. The increment rate of Id,sat is about 1.08~1.64% which is independent of channel width. The VT shift is lower than 1% for all length and width devices due to very small leakage current under longitudinal strain. The reliability of bending devices is evaluated using dynamic bending strain and static strain. Similarly, good mechanical bendability is certainly important for applications in flexible electronics. The fatigue properties of strain effect are examined by using dynamic bending stress and static bending test. The bending amplitude is 15mm under dynamic bending test. We observed only small shift in ID,sat, ID,lin, gm,lin and Vth as shown in Fig. 5(a) and (b). After several thousand bending cycles and one thousand hours of tensile strain for dynamic and static test, respectively, the device shows a very slightly degradation of ID,sat, ID,lin, gm,lin and Vth. A variation of DC characteristic for dynamic bending and static state bending is less than 1%. These results suggest that the substrate transfer procedure may have good fatigue properties on 15 mm bending radius and strain effect do not affect the device characteristics. Summary High performance nMOSFETs are realized for substrate transfer procedure.